? semiconductor components industries, llc, 2001 september, 2001 rev. 1 1 publication order number: ntp60n06l/d ntp60n06l, ntb60n06l power mosfet 60 amps, 60 volts, logic level nchannel to220 and d 2 pak designed for low voltage, high speed switching applications in power supplies, converters, power motor controls and bridge circuits. typical applications ? power supplies ? converters ? power motor controls ? bridge circuits maximum ratings (t c = 25 c unless otherwise noted) rating symbol value unit draintosource voltage v dss 60 vdc draintogate voltage (r gs = 10 m w ) v dgr 60 vdc gatetosource voltage continuous nonrepetitive (t p 10 ms) v gs v gs 15 20 vdc drain current continuous @ t a = 25 c continuous @ t a 100 c single pulse (t p 10 m s) i d i d i dm 60 42.3 180 adc apk total power dissipation @ t a = 25 c derate above 25 c total power dissipation @ t a = 25 c (note 1) p d 150 1.0 2.4 w w/ c w operating and storage temperature range t j , t stg 55 to 175 c single pulse draintosource avalanche energy starting t j = 25 c (v dd = 75 vdc, v gs = 5.0 vdc, l = 0.3 mh, i l (pk) = 55 a,v ds = 60 vdc) e as 454 mj thermal resistance junctiontocase junctiontoambient (note 1) r q jc r q ja 1.0 62.5 c/w maximum lead temperature for soldering purposes, 1/8 from case for 10 seconds t l 260 c 1. when surface mounted to an fr4 board using the minimum recommended pad size, (cu area 0.412 in 2 ). 60 amperes 60 volts r ds(on) = 16 m w device package shipping ordering information ntp60n06l to220ab 50 units/rail to220ab case 221a style 5 1 2 3 4 http://onsemi.com nchannel d s g marking diagrams & pin assignments x = p or b ntx60n06l = device code ll = location code y = year ww = work week ntx60n06l llyww 1 gate 3 source 4 drain 2 drain ntx60n06l llyww 1 gate 3 source 4 drain 2 drain 1 2 3 4 d 2 pak case 418b style 2 ntb60n06l d 2 pak 50 units/rail ntb60n06lt4 d 2 pak 800/tape & reel
ntp60n06l, ntb60n06l http://onsemi.com 2 electrical characteristics (t c = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics draintosource breakdown voltage (note 2) (v gs = 0 vdc, i d = 250 m adc) temperature coefficient (positive) v (br)dss 60 72.8 75.2 vdc mv/ c zero gate voltage drain current (v ds = 60 vdc, v gs = 0 vdc) (v ds = 60 vdc, v gs = 0 vdc, t j =150 c) i dss 1.0 10 m adc gatebody leakage current (v gs = 15 vdc, v ds = 0 vdc) i gss 100 nadc on characteristics (note 2) gate threshold voltage (note 2) (v ds = v gs , i d = 250 m adc) threshold temperature coefficient (negative) v gs(th) 1.0 1.58 5.4 2.0 vdc mv/ c static draintosource onresistance (note 2) (v gs = 5.0 vdc, i d = 30 adc) r ds(on) 12.4 16 m w static draintosource onresistance (note 2) (v gs = 5.0 vdc, i d = 60 adc) (v gs = 5.0 vdc, i d = 30 adc, t j = 150 c) v ds(on) 0.793 0.861 1.17 vdc forward transconductance (note 2) (v ds = 8.0 vdc, i d = 12 adc) g fs 48 mhos dynamic characteristics input capacitance (v 25 vd v 0 vd c iss 2195 3075 pf output capacitance (v ds = 25 vdc, v gs = 0 vdc, f = 1.0 mhz ) c oss 675 945 transfer capacitance f = 1 . 0 mhz) c rss 188 380 switching characteristics (note 3) turnon delay time t d(on) 50.4 100 ns rise time (v dd = 48 vdc, i d = 60 adc, v gs =50vdc t r 576 1160 turnoff delay time v gs = 5.0 vdc, r g = 9.1 w ) (note 2) t d(off) 100 200 fall time r g 9.1 w ) (note 2) t f 237 480 gate charge (v 48 vd i 60 ad q t 43.2 65 nc (v ds = 48 vdc, i d = 60 adc, v gs = 5.0 vdc ) ( note 2 ) q 1 6.4 v gs = 5 . 0 vdc) (note 2) q 2 29 sourcedrain diode characteristics forward onvoltage (i s = 60 adc, v gs = 0 vdc) (note 2) (i s = 60 adc, v gs = 0 vdc, t j = 150 c) v sd 0.98 0.86 1.05 vdc reverse recovery time (i 60 ad v 0 vd t rr 81.9 ns (i s = 60 adc, v gs = 0 vdc, dl s /dt = 100 a/ m s ) ( note 2 ) t a 42.1 dl s /dt = 100 a/ m s) (note 2) t b 39.8 reverse recovery stored charge q rr 0.172 m c 2. pulse test: pulse width 300 m s, duty cycle 2%. 3. switching characteristics are independent of operating junction temperature.
ntp60n06l, ntb60n06l http://onsemi.com 3 0.03 0.022 0.018 0.01 40 20 0 0.006 120 60 0.014 v ds = 5 v 80 100 0.026 0 t j = 25 c t j = 55 c t j = 100 c v gs = 10 v i d , drain current (amps) v gs = 10 v figure 1. onregion characteristics v ds , draintosource voltage (volts) 120 60 40 20 5 3 2 1 0 figure 2. transfer characteristics v gs , gatetosource voltage (volts) 6 4 3 2 1 120 60 40 20 0 0 figure 3. onresistance versus gatetosource voltage i d , drain current (amps) 0.03 0.022 0.018 0.01 40 20 0 figure 4. onresistance versus drain current and gate voltage i d , drain current (amps) 0.006 figure 5. onresistance variation with temperature t j , junction temperature ( c) 2 1.8 1.6 1.4 1.2 1 0.8 175 125 100 75 50 25 0 25 50 v ds , draintosource voltage (volts) 10 0 1000 100 10 0.6 10,000 figure 6. draintosource leakage current versus voltage i d , drain current (amps) r ds(on) , draintosource resistance ( ) 120 60 0.014 r ds(on) , draintosource resistance ( ) r ds(on), draintosource resistance (normalized) i dss , leakage (na) 20 60 4 30 40 50 3 v 3.5 v 4 v 8 v 6 v t j = 25 c t j = 55 c t j = 100 c v ds 10 v t j = 25 c t j = 55 c t j = 100 c v gs = 5 v i d = 30 a v gs = 5 v t j = 150 c v gs = 0 v t j = 100 c 80 100 80 100 5 80 100 150 t j = 125 c 4.5 v 5 v 0.026
ntp60n06l, ntb60n06l http://onsemi.com 4 power mosfet switching switching behavior is most easily modeled and predicted by recognizing that the power mosfet is charge controlled. the lengths of various switching intervals ( d t) are determined by how fast the fet input capacitance can be charged by current from the generator. the published capacitance data is difficult to use for calculating rise and fall because draingate capacitance varies greatly with applied voltage. accordingly, gate charge data is used. in most cases, a satisfactory estimate of average input current (i g(av) ) can be made from a rudimentary analysis of the drive circuit so that t = q/i g(av) during the rise and fall time interval when switching a resistive load, v gs remains virtually constant at a level known as the plateau voltage, v sgp . therefore, rise and fall times may be approximated by the following: t r = q 2 x r g /(v gg v gsp ) t f = q 2 x r g /v gsp where v gg = the gate drive voltage, which varies from zero to v gg r g = the gate drive resistance and q 2 and v gsp are read from the gate charge curve. during the turnon and turnoff delay times, gate current is not constant. the simplest calculation uses appropriate values from the capacitance curves in a standard equation for voltage change in an rc network. the equations are: t d(on) = r g c iss in [v gg /(v gg v gsp )] t d(off) = r g c iss in (v gg /v gsp ) the capacitance (c iss ) is read from the capacitance curve at a voltage corresponding to the offstate condition when calculating t d(on) and is read at a voltage corresponding to the onstate when calculating t d(off) . at high switching speeds, parasitic circuit elements complicate the analysis. the inductance of the mosfet source lead, inside the package and in the circuit wiring which is common to both the drain and gate current paths, produces a voltage at the source which reduces the gate drive current. the voltage is determined by ldi/dt, but since di/dt is a function of drain current, the mathematical solution is complex. the mosfet output capacitance also complicates the mathematics. and finally, mosfets have finite internal gate resistance which effectively adds to the resistance of the driving source, but the internal resistance is difficult to measure and, consequently, is not specified. the resistive switching time variation versus gate resistance (figure 9) shows how typical switching performance is affected by the parasitic circuit elements. if the parasitics were not present, the slope of the curves would maintain a value of unity regardless of the switching speed. the circuit used to obtain the data is constructed to minimize common inductance in the drain and gate circuit loops and is believed readily achievable with board mounted components. most power electronic loads are inductive; the data in the figure is taken with a resistive load, which approximates an optimally snubbed inductive load. power mosfets may be safely operated into an inductive load; however, snubbing reduces switching losses. 10 2000 4000 6000 8000 c, capacitance (pf) 5 gatetosource or draintosource voltage (volts) figure 7. capacitance variation v gs v ds v gs = 0 v v ds = 0 v t j = 25 c c rss c iss c oss c rss c iss 0 5 10 15 25 20 0
ntp60n06l, ntb60n06l http://onsemi.com 5 i s , source current (amps) t, time (ns) v gs , gatetosource voltage (volts) 60 0 0.86 0.3 draintosource diode characteristics v sd , sourcetodrain voltage (volts) figure 8. gatetosource and draintosource voltage versus total charge figure 9. resistive switching time variation versus gate resistance r g , gate resistance ( w ) 1 10 100 1000 10 v ds = 30 v i d = 60 a v gs = 5 v v gs = 0 v t j = 25 c figure 10. diode forward voltage versus current 0 5 3 1 0 q g , total gate charge (nc) 6 4 2 20 50 40 100 10 30 0.38 0.46 0.54 0.62 0.7 0.78 20 30 50 10 40 i d = 60 a t j = 25 c v gs q 2 q 1 q t t r t d(off) t d(on) t f t j = 150 c t j = 25 c safe operating area the forward biased safe operating area curves define the maximum simultaneous draintosource voltage and drain current that a transistor can handle safely when it is forward biased. curves are based upon maximum peak junction temperature and a case temperature (t c ) of 25 c. peak repetitive pulsed power limits are determined by using the thermal response data in conjunction with the procedures discussed in an569, atransient thermal resistancegeneral data and its use.o switching between the offstate and the onstate may traverse any load line provided neither rated peak current (i dm ) nor rated voltage (v dss ) is exceeded and the transition time (t r ,t f ) do not exceed 10 m s. in addition the total power averaged over a complete switching cycle must not exceed (t j(max) t c )/(r q jc ). a power mosfet designated efet can be safely used in switching circuits with unclamped inductive loads. for reliable operation, the stored energy from circuit inductance dissipated in the transistor while in avalanche must be less than the rated limit and adjusted for operating conditions differing from those specified. although industry practice is to rate in terms of energy, avalanche energy capability is not a constant. the energy rating decreases nonlinearly with an increase of peak current in avalanche and peak junction temperature. although many efets can withstand the stress of draintosource avalanche at currents up to rated pulsed current (i dm ), the energy rating is specified at rated continuous current (i d ), in accordance with industry custom. the energy rating must be derated for temperature as shown in the accompanying graph (figure 12). maximum energy at currents below rated continuous i d can safely be assumed to equal the values indicated.
ntp60n06l, ntb60n06l http://onsemi.com 6 safe operating area e as , single pulse draintosource avalanche energy (mj) t j , starting junction temperature ( c) 0 25 50 75 100 125 100 i d = 55 a 175 300 500 150 200 400 r(t), effective transient thermal resistance (normalized) i d , drain current (amps) figure 11. maximum rated forward biased safe operating area t, time ( m s) 0.1 1.0 0.01 0.1 0.2 0.02 d = 0.5 0.05 0.01 single pulse r q jc (t) = r(t) r q jc d curves apply for power pulse train shown read time at t 1 t j(pk) t c = p (pk) r q jc (t) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 1.0 10 0.1 0.01 0.001 0.0001 0.00001 figure 12. maximum avalanche energy versus starting junction temperature 0.1 1 v ds , draintosource voltage (volts) figure 13. thermal response 1000 r ds(on) limit thermal limit package limit 1 0 10 10 figure 14. diode reverse recovery waveform di/dt t rr t a t p i s 0.25 i s time i s t b 100 100 v gs = 20 v single pulse t c = 25 c 1 ms 100 m s 10 ms dc 10 m s
ntp60n06l, ntb60n06l http://onsemi.com 7 package dimensions to220 threelead to220ab case 221a09 issue aa style 5: pin 1. gate 2. drain 3. source 4. drain notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.035 0.64 0.88 f 0.142 0.147 3.61 3.73 g 0.095 0.105 2.42 2.66 h 0.110 0.155 2.80 3.93 j 0.018 0.025 0.46 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 --- 1.15 --- z --- 0.080 --- 2.04 b q h z l v g n a k f 123 4 d seating plane t c s t u r j d 2 pak case 418b03 issue d style 2: pin 1. gate 2. drain 3. source 4. drain notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. seating plane s g d t m 0.13 (0.005) t 23 1 4 3 pl k j h v e c a dim min max min max millimeters inches a 0.340 0.380 8.64 9.65 b 0.380 0.405 9.65 10.29 c 0.160 0.190 4.06 4.83 d 0.020 0.035 0.51 0.89 e 0.045 0.055 1.14 1.40 g 0.100 bsc 2.54 bsc h 0.080 0.110 2.03 2.79 j 0.018 0.025 0.46 0.64 k 0.090 0.110 2.29 2.79 s 0.575 0.625 14.60 15.88 v 0.045 0.055 1.14 1.40 b m b
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